M5 stack board with normal code
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Hi,
We have created a good working code for ESP32modules. now we have m5stack with us and we want to run our code on it but does not work.
I am sharing backtrace:
Backtrace: 0x400902bc:0x3ffe3b50 0x400904bf:0x3ffe3b70 0x4008ecb7:0x3ffe3b90 0x4008ecc7:0x3ffe3bb0 0x4008df09:0x3ffe3be0 0x400833f0:0x3ffe3c10 0x40083588:0x3ffe3c40 0x4007892f:0x3ffe3c60 0x40078995:0x3ffe3c90 0x400789a0:0x3ffe3cc0 0x40078b33:0x3ffe3ce0 0x40080309:0x3ffe3df0 0x40007c31:0x3ffe3eb0 0x4000073d:0x3ffe3f20
Rebooting...
ets Jun 8 2016 00:22:57rst:0xc (SW_CPU_RESET),boot:0x17 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:1
load:0x3fff0018,len:4
load:0x3fff001c,len:808
load:0x40078000,len:6084
load:0x40080000,len:6696
entry 0x400802e4
/Users/ficeto/Desktop/ESP32/ESP32/esp-idf-public/components/freertos/timers.c:921 (prvCheckForValidListAndQueue)- assert failed!
abort() was called at PC 0x4008ecb7 on core 0
Decoding stack results
0x400902bc: invoke_abort at /Users/ficeto/Desktop/ESP32/ESP32/esp-idf-public/components/esp32/panic.c line 140
0x400904bf: abort at /Users/ficeto/Desktop/ESP32/ESP32/esp-idf-public/components/esp32/panic.c line 149
0x4008ecb7: prvCheckForValidListAndQueue at /Users/ficeto/Desktop/ESP32/ESP32/esp-idf-public/components/freertos/timers.c line 921
0x4008ecc7: xTimerCreateTimerTask at /Users/ficeto/Desktop/ESP32/ESP32/esp-idf-public/components/freertos/timers.c line 270
0x4008df09: vTaskStartScheduler at /Users/ficeto/Desktop/ESP32/ESP32/esp-idf-public/components/freertos/tasks.c line 2061
0x400833f0: start_cpu0_default at /Users/ficeto/Desktop/ESP32/ESP32/esp-idf-public/components/esp32/cpu_start.c line 380
0x40083588: call_start_cpu0 at /Users/ficeto/Desktop/ESP32/ESP32/esp-idf-public/components/esp32/cpu_start.c line 213 -
What exactly do you call "normal code"?
Without a code sample, this community won't be able to help you...I had no problem running any ESP32 code on M5Stack, after i made the proper modifications related to GPIO assignment.