Best posts made by vkichline

@josestevez; no habla espanol muy bien, pero Visual Studio Code con PlatformIO es mas rapido siguente el primero vez.

Hi! This is my first post in this community.
I submitted a pair of projects to GitHub for controlling the BugC hat for the M5StickC with another M5StickC with a Joystick hat using ESP-Now. This turns out to be a very nice remote control protocol, and has longer range and easier setup than WiFi.
PlatformIO projects are similar to Arduino, if you use Arduino but not PlatformIO, you can easily convert the code.
If you are interested see:
https://github.com/vkichline/BugC
https://github.com/vkichline/BugController

Are you talking about NVS (Non Volatile Storage?)
M5ez uses it for its preferences. Here is a file that reads and writes them in C: https://github.com/vkichline/M5ezSettingsStorage/blob/master/m5ez_prefs_storage.cpp

Basically, just include preferences.h, call prefs.begin with false for read/write, then use the accessors from preferences.h and finish with prefs.end().

Rop's latest sample (M5Sound, in this forum) make me wonder what a reasonable, minimum size and spacing should be for TouchButtons. At almost 80 X 60 pixels, the DTMF buttons are usable, but already require some care with only 12 on the screen.
I dug up an old passive capacitive stylus (the kind that looks like a soft pencil eraser) and found it increases speed and accuracy. Maybe a 50 X 50 pixel button would be usable with the passive stylus (doubling the number of buttons available.)
I see that there are active capacitive styluses available with much smaller tips. Does anyone have one? Does it work well with the Core2?

I pushed a second version today that lets you select a channel, then does automatic discovery and pairing. This would allow multiple pairs to race or fight each other. Far easier to compile, no Secrets to set up, etc.
I have more plans to make pairing easier. Once I'm satisfied I'll add some pictures or videos.

I wrote a program to see what a reasonable minimum size touch button is: https://github.com/vkichline/ButtonSizeTest
It's a test you play: it lets you choose what size button and what spacing; it makes a bunch of buttons and asks you to press eight of them. At some point you should stop getting perfect scores.
I'd be interested in hearing what people find a usable minimum to be.

Caution: to use this app, you need RopG's PR for M5Core2. You can download the touch button version of the lib here: https://github.com/ropg/M5Core2.

I wrote a calculator for the M5Stack and the Calculator Keyboard FACE:
https://github.com/vkichline/FullCalculator-Arduino
I designed it to be extensible, but the structure of a calculator that behaves like you expect it to turns out to be pretty concept-heavy. I tried to include enough comments and documentation to make the project extendable.

The link above is an Arduino port of the working project: https://github.com/vkichline/BetterM5Calculator. It requires PlatformIO, but includes a battery of unit tests as well. If you want to make changes, start there. The tests let me know quickly when I broke something obscure.
I enjoyed working on it for a couple weeks, but am ready for a break. I hope someone finds it useful.

I'm trying to build M5Stack Core2 projects on PlatformIO (on Windows, if it matters.)
I've been tracking RopG's Fork, so M5Core2 was in my project's lib folder, and things worked fine.
Now I've moved it to the [user].platformio\lib folder, and I have problems.

If the M5Stack library is NOT installed, the project compiles and links and this is the Dependency Graph:

|-- <M5Core2> 0.0.1
|   |-- <Wire> 1.0.1
|   |-- <SPIFFS> 1.0
|   |   |-- <FS> 1.0
|   |-- <FS> 1.0
|   |-- <SPI> 1.0
|   |-- <HTTPClient> 1.2
|   |   |-- <WiFi> 1.0
|   |   |-- <WiFiClientSecure> 1.0
|   |   |   |-- <WiFi> 1.0        
|   |-- <SD(esp32)> 1.0.5
|   |   |-- <FS> 1.0
|   |   |-- <SPI> 1.0

However, if both M5Stack and M5Core2 libraries are installed in [user].platformio\lib, I get this Dependency Graph:

|-- <M5Core2> 0.0.1
|   |-- <Wire> 1.0.1
|   |-- <SPIFFS> 1.0
|   |   |-- <FS> 1.0
|   |-- <FS> 1.0
|   |-- <SPI> 1.0
|   |-- <HTTPClient> 1.2
|   |   |-- <WiFi> 1.0
|   |   |-- <WiFiClientSecure> 1.0    
|   |   |   |-- <WiFi> 1.0
|   |-- <M5Stack> 0.3.0
|   |   |-- <FS> 1.0
|   |   |-- <SPIFFS> 1.0
|   |   |   |-- <FS> 1.0
|   |   |-- <SPI> 1.0
|   |   |-- <HTTPClient> 1.2
|   |   |   |-- <WiFi> 1.0
|   |   |   |-- <WiFiClientSecure> 1.0
|   |   |   |   |-- <WiFi> 1.0        
|   |   |-- <Wire> 1.0.1
|   |   |-- <SD(esp32)> 1.0.5
|   |   |   |-- <FS> 1.0
|   |   |   |-- <SPI> 1.0
|   |-- <SD(esp32)> 1.0.5
|   |   |-- <FS> 1.0
|   |   |-- <SPI> 1.0

Everything compiles, but I get innumerable linking errors like:

.pio\build\m5stack-fire\libb51\libM5Core2.a(M5Core2.cpp.o):(.bss.M5+0x0): multiple definition of `M5'
.pio\build\m5stack-fire\lib3c8\libM5Stack.a(M5Stack.cpp.o):(.bss.M5+0x0): first defined here
c:/users/van/.platformio/packages/toolchain-xtensa32/bin/../lib/gcc/xtensa-esp32-elf/5.2.0/../../../../xtensa-esp32-elf/bin/ld.exe: Warning: size of symbol `M5' changed from 332 in .pio\build\m5stack-fire\lib3c8\libM5Stack.a(M5Stack.cpp.o) to 1856 in .pio\build\m5stack-fire\libb51\libM5Core2.a(M5Core2.cpp.o)

My platformio.ini is plain vanilla:

[env:m5stack-fire]
platform = espressif32
board = m5stack-fire
framework = arduino
monitor_speed = 115200

I've tried it with incredibly trivial projects, it's always the same.
Any suggestions? Is anyone successful at this?

@felmue That's a very simple change and works great! Thanks a million!
Still on the topic of "Is there a Brain Genius in the House?" I have one more PlatformIO question:

When I compile Core2 programs that allocate lots of memory, they work if built on Arduino but fail at runtime if built on PIO. It seems that Arduino is somehow dynamically aware of the 8MB PSRAM, while PIO is not. I believe PIO uses the board def to select ..\partitions\default_16MB.csv, which seems to limit app0 to 64K. I bet that's it.

So when I execute a statement like disp.createSprite(320, 240) it works fine if I build with Arduino, but PIO tells the Core2 it doesn't have that much RAM, so it fails. The factory test program likewise won't run if built as an M5Stack-Fire on PIO.

Does anyone have a definition for an M5Stack-Core2 board and an appropriate partition map for it for PIO?